FPGA: How to read and write to a memory block on an FPGA daq card created using the memory extension utility program?

[Simon L]

Hi

Basically I am trying to aquire analogue data on 1 of the 8 AI inputs of a PCI 7831R daq card by writing it to a user created FPGA memory block and then reading the data back to the host via an interrupt.
I can manage the above task when using the pre-written memory read and write vi's that are given in labview fpga 1.1 module as the two respective vi's are independant vi's that can be programmed seperately in the same vi. This is illustated with shared code found in the ni example finder on labview 7.1 called 'Timed AI, on board memory fpga and host vi's.
But when i come to create my own memory block with the extension utility program it creates a shared non-reentrant vi and i can't for the life in me sort out the code correctly. I am on my 10th version and very close to cracking it but the sequence falls down when i read the code back from the FPGA card. The sine wave i am trying to retrieve from the memory block appears but is made up of steps and i think this is due to the fpga card clocking faster than the host (PC) so i get the same analogue value for for 4-5 addresses

Anyone that could provide help or code would be greatly appreciated. I can always post my code (10th attempt) if it will help!

Thanks

[Steven Bird]

Hello Simon,

Have you had any further luck with this? I know we have spoken on this issue and it seems we are pushing you forward. I have simply picked this DF up because if nobody answers the questions after a period of time it comes through to us at NI.

Please let me know how its going.

Kind Regards


Steven Bird
Applications Engineer
National Instruments

[Simon L]

Hi Steven

Thanks for replying.

No i have still not mangaged to resolve the issue completely. I feel i am very close but can't sort out the timing problem. Every time i try add some code to rectify the timing issue i don't acquire any data at all, even though the code debugs perfectly using the emulator. The problem seems to be the interface between the fpga and the pc (host). I know the labview fpga is relatively new but somebody must have worked through the problems i am encountering, most likely in the states perhaps. That was the real the reason for posting my message on the discussion forum, but to no evail so far.

[Christian_L]

Simon,

Please post your code so that I can take a look at it. This should be an easy problem to resolve. Please make sure to include all the subVIs including the memory block VI you are using.