acquiring CMOS sensor image

[Nealho]

Hi,

I am new in vision. I have problems in acquiring CMOS sensor image. My project would like to acquire CMOS image sensor digital data by using camera link protocol. I am sure that COMS sensor output is correct and the LVDS transmitter generates signals(I am not sure if the output is correct, it's hard to me to identify them).

The camera file generator always said "Cannot detect valid timing signals. Make sure the camera is turned on, outputing video (not waiting for a trigger). and connect correctly." I had checked my pin assignment between sensor and transmitter IC, and set the Pclk output at 24MHz(The LVDS transmitter IC work at 20MHz~85MHz).

Is there any initial sequence when connecting CMOS camera to a Frame grabber?
Is is possible to acquire the image for a normal CMOS image sensor by using NI frame grabber?

Any advise will be appreciated.

OS:WinXP SP2
Frame grabber: NI-1426
CMOS image sensor: 1.3M pixel CMOS sensor
NI Camea File Generator v2.0

Neal
hyz1230@gmail.com

[Nealho]

I just read a article describes the timing requirement:
http://digital.ni.com/public.nsf/allkb/E8030D8C9B12A2C186256AA9004C75FA

Is the "3 blanking pixels per line & 3 blanking lines per frame" a MUST requirement?

The output timing of the CMOS sensor I use. I am limited with the register function it provides.
I think the blanking lines output timing is close to the requirement. But the blanking pixels is over 3 per line.
It's about 50-120 pixels per line.
Will it be rejected by frame grabber?

Any advise is appreciated.

Neal
hyz1230@gmail.com

[David S.]

Hi Nealho -

The requirements listed in KB 2CE7SIYJ (the one you linked) are listed for the NI-1422 and NI-1424 framegrabbers.  These boards are designed to communicate with nonstandard LVDS and RS-422 cameras.  The NI-1426, however, is a Base configuration CameraLink board, and will only work with cameras that communicate using the CameraLink standard.  This standard dictates line states, voltage levels, clock rates, and other hardware signal/timing information required by the board.

In general, however, the timings listed in that document are also minimum-length requirements for most NI framegrabbers.  If your line blanking time is in excess of 3 pixels (especially far in excess, as with 50 pixels), you should be fine.  The 3-line frame blanking time is required to allow the board to rearm itself for the next frame.  This is a system-dependent length, because of communication over the PCI/PXI bus.  In general, it takes about 20-30 microseconds, so we ask that 3 lines be given at the end of each frame.  If you exceed this, all the better, and in some cases you may be able to undercut it a little.

[Nealho]

Hi David,

Thank you very much. Your answer helps me to clearfy the timing issue.
I am wondering if it is possible for NI-1426 to grab CMOS sensor image?
Currently the LVDS chip I use is NS DS90CR287, is the LVDS pair of DS90CR288A.
The NI-1426 receiver uses this chip to receive LVDS signals.

My project is to grab the CMOS sensor image by using camera link protocol.
The sensor output image data D0~d7, Pclk, Hsync, Vsync.
I already have the capability to control the sensor register to generate the proper timing and signal phase.
And I follow the siglal bit assignment of camera link protocol to design the PCB(My EV board is 2 layers because of $$$).
Unfortunately, I always get "Cannot detect valid timing signals. Make sure the camera is turned on, outputing video (not waiting for a trigger). and connect correctly." message.

My questions are:
1. Is it possible to grab CMOS sensor image by using NI-1426?
2. Is there any initial sequence when connecting CMOS camera to a Frame grabber?
3. Should I modify camera file by manual to fit my special application?
4. From the error message, it seems I didn't provide the FVAL, LVAL signal. Does the error message mean that?

Thanks in advance.

Neal

[David S.]

Hi Nealho -

In response to each question:

1. The NI-1426 can receive any Base configuration CameraLink signal.  Whether the image data is acquired using a CCD, CMOS, or other sensor is somewhat irrelevant, since the frame data must be transmitted according to this standard.  I looked at the data sheet for the LVDS chip you're using, and this chip does conform to the ChannelLink protocol, which is used by CameraLink. Specific connections between the CMOS and chip, as well as signal timing and synchronization on the chip, will be defined in the chip's documentation.

2. I don't know if there is a necessary "startup" sequence when transmitting data over a CameraLink connection.  Requirements and specifications will be outlined in a licensed document located at the following website:
http://www.machinevisiononline.org/public/articles/articlesdetails.cfm?id=2028

3. Creating a custom camera file can be difficult and is recommended for advanced users and camera manufacturers only.  If you would like to create your own camera file (which is used to initialize the framegrabber board), I recommend downloading and installing the NI Camera File Generator utility, located here:
http://sine.ni.com/nips/cds/view/p/lang/en/nid/201791

This utility lets you create a custom camera file according to your specifications.  (Directly editing the camera file is not advised by NI, and doing so is generally discouraged.)  I should warn you, however, that we cannot fully support camera files created with this utility, and that it is supplied as a tool for advanced developers.

4. I'm not familiar with this error message, but it appears to be reporting that the timing signals required in a CameraLink connection were not present.  If you have the exact error number associated with this mesage, you can use it as a search string to find more information on NI.com and the DevZone.  Again, you may need to refer to a copy of the CameraLink standard to verify that your setup is sending the appropriate information to the framegrabber.

[Nealho]

Hi David,

Thanks for your help. Now I can acquire the image.
The root cause is the camera link cable.
It seems the cable we use is for LVDS, not for camera link.
After we replace the cable. our camera works.

Regards,
Neal

[BrianBacker]

David,

I am having a similar problem - i am using a "custom" camera with some strage timings related to showing progressive frames on an interlaced amalog monitor (in other words, we have a non-interget number of rows per frame.... difficult to describe).  I have read the CameraLink specification and we are using a National chip that conforms to this spec.  We are using a National-1429 frame grabber

The question i have is this - what signal is used to determine the start of a frame.  Assuing that FVAL is valid high, is the rising edge or falling edge of this signal used to retrigger?  Sadi another way, which edge of FVAl is used to say "this is the start of teh frame" and which edge - if any - is used to say "this is the end of the frame"

A similar, more basic question is this.  I am assuming that all three clock signals (FVAL, LVAL, and DVAl if DVALMode is 1) need to be true for a valid pixel to be captured on the rising edge of pixel clock?

Thanks
Brian