CRIO DMA Multiplexer

[St3ve]

Hi,

I am thinking of changing the way I aquire the data from my cRIO and was thinking about developing some sort of multiplexer over a target-host DMA channel.

It needs to handle data being written at different rates - I was thinking of using queues to buffer the aquisition loops to the DMA write on the FPGA.

I was thinking of writing an identifier numeric before each data packet that identified which channel it was and how long the following data array was. Then on the RT there would be 2 sequential DMA read functions. The first would read the identifier and then know what the data was and how long the array was. The second read function would then read the data array etc.

Has any one got any ideas or already done this or something similar?

Many thanks,

Steve.

[BruceAmmons]

Steve,

It looks like you posted this on the wrong forum.  It doesn't really have anything to do with vision.

I don't think you can use queues on an FPGA, so it doesn't sound like it will work very well.  It is difficult to store data on an FPGA.  You are better off sending it out as fast as you can.

I would consider one DMA channel for each DAQ rate, and send one scan of all channels at a time.  It depends how many scan rates you have, though, because there is a limited number of DMA channels.

I would also consider just sending the most recent values of every channel every time.  For the slower channels, you would send the same value N times, where N is the ratio between the fast and slow channels.  On the RT side, you could downsample the slow channels easily.

It really depends how many channels at each rate and how many rates there are to really answer this question.  It also depends if these are fixed rates or user selectable rates.  There isn't enough details in your question to give you a really good answer.

Bruce