08-01-2008 01:38 AM
08-01-2008 02:31 AM
03-18-2009 11:18 PM
If I understand you correctly the FPGA bitfile is stored in flash and volatile memory. If I delete the bitfile from flash, how come I can run the FPGA VI fine after a power off? (I'm not using the project environment/connecting or deploying anything, just inspecting some shared variables I am writing to on the RT host target which are values read from FPGA VI).
Also, when it is stored in flash where is the file? Is it in some area where that is not accessible to the FTP client?
Thanks,