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synchronization problem between FPGA and host

Hi,
I have cRIO 9004 with 9104 FPGA and 9201 IO module with me. A sine wave is acquired from the IO module and sent to FPGA vi. It is displayed in host vi. The interrupt method is used for syncronization. But the sampling rate of IO module 500kS/s is not achieved. Is there any problem with my streaming code?


Message Edited by Sithu on 07-22-2008 11:54 PM
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Sithu,

I don't think interrupts can be used at that rate.  Instead try the method from this  (post 24) post by Basset Hound.



Message Edited by StevenA on 07-22-2008 11:57 PM
SteveA
CLD

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FPGA/RT/PDA/TP/DSC
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