lock in help

[suethechemist]

Can anyone offer any help with the principles of lock-in detection? (suggest useful references etc). I'm trying to adapt some code I found on the internet, but I'm struggling to make progress because I don't actually understand what's going on in the 'original'! I've tried to contact the person who developed this VI, but haven't had any reply. The original code is from the University of Texas (hence UTiLIA) - they were investigating high temperature superconductivity, measuring small voltage changes buried in noise. There are references to some of their papers at http://mrflip.com/papers/LIA/. I need to measure small photodiode voltage changes buried in noise. I don't think the LIA on the NI site is suitable for my card (PCI6035E), which is why I've been working on UTiLIA, even though the NI version looks like it's more suitable. I hope to use the sinusoidal output to modulate the current of my laser directly (instead of using a chopper to give amplitude modulation). A brief 'verbal' description of the lock-in VIs and the averaging section would be helpful. I've named my modified version QUiLIA (Queen's University LIA), still a work in progress(!)

[johnsold]

Sue,

A lock-in amplifier is a synchronous filter with amplification. Synchronous filtering applies certain trigonometric identities to signal processing. In particular the product of two sine waves of the same frequency has a constant coomponent proportional to the phase difference as well as components at the original frequency and twice the frequency. The synchronous filter multiplies the (noisy) input signal by a reference signal at the freqency of the desired component, low pass filters the product, thereby extracting information about the desired signal, and then multiplies it again by the reference frequency to generate a replica of the desired component with much reduced noise. Some lock-ins omit the last step and use the DC output.

The Lock and Rolling average VIs seem to have reasonable documention of their approaches on the diagram. If you have other questions, please try to be a specific as possible.

I don't have much experience with software implementation of lock-ins, but it is fairly straightforward to extract signals with -30 to -40 dB signal to noise ratios with modest hardware circuits.

Lynn

[Lilly N]

Hi Sue,

There is quite alot of information that can be found at the National Instruments website that may be of some help to you.

Have you looked at the lock-in amplifier example available from National Instruments? This can be found at the following link:
http://sine.ni.com/apps/we/niepd_web_display.display_epd4?p_guid=B6E4E91305195C5DE034080020E74861&p_node=DZ52260&p_source=External

This example is mainly for the 4472, but there is some information about using the lock in amplifier with non DSA hardware at the following:
http://digital.ni.com/public.nsf/websearch/EBAADBD271ADFEC586256C86007B63F9?OpenDocument

A tutorial on lock-in amplifiers can also be found at the website:
http://zone.ni.com/devzone/conceptd.nsf/webmain/3b2936e1afe39ac286256c2f00746422

Have a read through, and let me know how you get on.

Regards,

Lilly N
National Instruments UK & Ireland

[suethechemist]

Yes, I did look at the NI version and my main worry is simultaneous sampling (I have an E-series board), but I will look again and not just dismiss it as being impossible to use. I was working on UTiLIA because it was developed for almost identical hardware to mine, but I'm starting to wonder if the same 'problems' exist there (even though they got excellent results). Since there is only one ADC, won't there be a small delay between the sine wave that is output in UTiLIA and the detected signal? (they GENERATE the reference rather than extract it from the chopper). So, I'm a bit more hopeful now that results are possible despite the hardware issues. Thanks.

[johnsold]

Yes, there will be a delay between channels. However, it is a systematic delay and can thus be compensated if necessary. If your sampling rate is high enough that the interchannel delay is a small fraction of one cycle at the reference frequency, it represents a small phase shift, perhaps small enought to be negligible.

Lynn