03-04-2015 01:00 PM
Does anyone have a detailed explanation of how the IP integration node works? I'm finding it extremely difficult to deal with the dependencies when
Every instance of a node creates isim or xsim files even if the node is copied or otherwise identical. There doesn't seem to be any rule for wheather isim is created or xsim is created (LV 2014) either.
Can a common set of sim files be designated for multiple identical IP integration nodes so that I can maintain configuration control and prevent dependency hell?
Thanks
03-04-2015 03:48 PM
I just found that even cutting and pasting an IP integration node to the same VI will result in a new simulation support directory copy and a broken VI. The only way to avoid this is to save-as the VI which, for some reason, doesn't end in a new simulation support directory and regeneration warning.
03-05-2015
06:16 PM
- last edited on
01-10-2025
11:58 AM
by
Content Cleaner
Hi xl600,
I have found a couple of useful documents that relate to your questions. The first is a guide for moving IP Integration Nodes to another computer or between LabVIEW versions https://www.ni.com/docs/en-US/bundle/labview-fpga-module/page/moving-ip-integration-nodes-to-another.... Here is the help file for the IP Integration Node which also has useful links on the bottom of the page https://www.ni.com/docs/en-US/bundle/labview-fpga-module/page/using-the-ip-integration-node-fpga-mod.... Lastly I found a tutorial about importing external IP into LabVIEW which includes information on using the IP Integration Node https://knowledge.ni.com/KnowledgeArticleDetails?id=kA03q000000x0jiCAA&l=en-US.
Let me know if you can’t find what you're looking for in these pages.
03-06-2015 08:49 AM
Thanks for that link. It helps understand what files relate to IP nodes. It doesn't mention good techniques for preventing duplicate sim support files for every copy of a node in the same VI or pasted into another VI.
One thing I tried, which seems to work, is to encapsulate the node in a wrapper Sub-VI with terminals directly connecting to the node. I can then copy and paste the VI anywhere without fear of causing multiple identical sim support directories. I'm not entirely sure why this works and direct copy/paste doesn't, but it provides the kind of work around I needed. It also lets me place a little logic around the node like explicit conversions or other no-resource items (FPGA). I even get to make a fancy icon for the node with a wrapper VI.
03-09-2015
02:51 PM
- last edited on
01-10-2025
12:37 PM
by
Content Cleaner
No problem, I'm glad that the documents helped! I found a couple more helpful links to look into for more information about manipulating the simulation files. First here is a link to Synthesis Files and Simulation from which there is a lot of useful sublinks https://www.ni.com/docs/en-US/bundle/labview-fpga-module/page/synthesis-files-and-simulation-fpga-mo.... Here is the sublink that I think that you will find most useful about setting the simulation behavior https://www.ni.com/docs/en-US/bundle/labview-fpga-module/page/changing-simulation-behavior-fpga-modu....
04-07-2015 04:35 PM
I just tried to move an IP node to a new folder and am now stuck. The VI containing the node claims it can't find the source files (VHD) and somehow has absolute path references. It wants me to re-select all the VHDL files and rebuild (Thus destroying source control). The document on how to move nodes doesn't appear to work:
If I move the entire directory to a new location on disk, the VI breaks.
Not sure why this doesn't work or where LV 2014SP1 is getting the original path information from.
04-08-2015
04:49 PM
- last edited on
01-10-2025
12:37 PM
by
Content Cleaner
Just to be sure, the link you were looking at for moving IP nodes is the one I sent you earlier https://www.ni.com/docs/en-US/bundle/labview-fpga-module/page/moving-ip-integration-nodes-to-another...? Can you post a screenshot of the error that you are getting?
04-08-2015
05:01 PM
- last edited on
01-10-2025
12:37 PM
by
Content Cleaner
I don't have access to the development machine today so I can't get a screenshot yet. The error in the VI claims that the integration node files have to be regenerated. When I click on configure on the node, it claims it can't find any of the VHDL synthesis sources. All of the sources still show the old absolute path even though I moved the entire directory containing the vi, VHDL sources, and simfiles. This is essentially what is recommended in the https://www.ni.com/docs/en-US/bundle/labview-fpga-module/page/moving-ip-integration-nodes-to-another... note. There are no xilinx configuration, ngc, or EDIF files. Simulation behavior is "Same as synthesis" for all files.
Something is causing the node to retain the absolute paths originally configured.
04-09-2015 09:39 AM
Here is the entire file structure that is moved:
C:\<NEW Path>\CLIPS\LVPACKER
│ LVPacker.mpf
│ LvPacker.vhd
│ LvPacker.xml
│ LvPacker64.vhd
│ Pack 128 to 64.vi
│ Pack 80 to 128.vi
│ Packer.vhd
│ PkgPacker.vhd
│ SrlFifo.vhd
│
├───Pack_128_to_64SimFiles
│ │ LvPacker64_54ACB46B3FD14BCA8ECE3EB522FBB2F3.dll
│ │
│ └───isim
│ ├───LvPacker64_54ACB46B3FD14BCA8ECE3EB522FBB2F3.dll.sim
│ │ └───work
│ │ a_1810922747_1516540902.didat
│ │ a_2817732877_3708392848.didat
│ │ a_3299309618_1516540902.didat
│ │ a_3742810370_3708392848.didat
│ │ p_4218428394.didat
│ │
│ └───precompiled.exe.sim
│ └───ieee
│ p_1242562249.didat
│ p_2592010699.didat
│
└───Pack_80_to_128SimFiles
│ LvPacker64_2E8008F20E894372913207AAC3A78DC3.dll
│
└───isim
├───LvPacker64_2E8008F20E894372913207AAC3A78DC3.dll.sim
│ └───work
│ a_0779080378_3708392848.didat
│ a_1607675565_3708392848.didat
│ a_2926299118_1516540902.didat
│ a_3466742103_1516540902.didat
│ p_4218428394.didat
│
└───precompiled.exe.sim
└───ieee
p_1242562249.didat
p_2592010699.didat
The DLL is shown in the project FPGA dependencies with the new path yet the VI claims not to be able to find it.
Here is the error the VI is claiming (Was working before moving the above file structure):
Here is the VI:
Here is the error the node configuration is claiming (Path indicated is the OLD path prior to the move):
Something is confused between the project, the VI, and the node. Certainly I am confused.
Thanks
04-09-2015
12:26 PM
- last edited on
01-10-2025
12:38 PM
by
Content Cleaner
This issue also occurs when attempting to open the moved vi outside of a project.
The vi is not updating its paths completely and the node is not updating the paths of the synthesis files (Thus demainding regeneration). Totally not in keeping with ipin_move_source even though I'm using the same LV FPGA version (2014)