i am using a CRIO system with crio9104 , ni 9401 digital i/o and ni9215 analog input. fpga compiler gives an error. Help me please

[JJROBOT]

#----------------------------------------------#
# Starting program map
# map -o toplevel_gen_map.ncd -intstyle xflow toplevel_gen.ngd toplevel_gen.pcf
#----------------------------------------------#
Using target part "2v1000fg456-4".
Mapping design into LUTs...
ERROR:MapLib:661 - LUT4_L symbol
   "mytop/n_962/n_961/n_955/nSCTL_L48175572_275_932/n_918/Mmux_sel033fd08c_t0b4a
   8b90104_SW0" (output
   signal=mytop/n_962/n_961/n_955/nSCTL_L48175572_275_932/n_918/Mmux_sel033fd08c
   _t0b4a8b90104_SW0/O) has input signal
   "mytop/n_962/n_961/n_955/nSCTL_L48175572_275_932/n_918/s000001cc<0>_mand"
   which will be trimmed. See the trim report for details about why the input
   signal will become undriven.
ERROR:MapLib:661 - LUT4 symbol
   "mytop/n_962/n_961/n_955/nSCTL_L48175572_275_932/n_918/Mmux_sel033fd08c_t0b4a
   8b90104_SW11" (output signal=N4407) has input signal
   "mytop/n_962/n_961/n_955/nSCTL_L48175572_275_932/n_918/n_888/xGTLo" which
   will be trimmed. See the trim report for details about why the input signal
   will become undriven.
ERROR:MapLib:661 - LUT4 symbol
   "mytop/n_962/n_961/n_955/nSCTL_L48175572_275_932/n_918/Mmux_sel033fd08c_t0b4a
   8b90104_SW11" (output signal=N4407) has input signal
   "mytop/n_962/n_961/n_955/nSCTL_L48175572_275_932/n_918/n_888/xLTHi" which
   will be trimmed. See the trim report for details about why the input signal
   will become undriven.
ERROR:MapLib:661 - LUT3 symbol
   "mytop/n_962/n_961/n_955/nSCTL_L48175572_275_932/n_918/Mmux_sel033fd08c_t0b4a
   8b90104_SW12" (output signal=N4408) has input signal
   "mytop/n_962/n_961/n_955/nSCTL_L48175572_275_932/n_918/n_888/xGTLo" which
   will be trimmed. See the trim report for details about why the input signal
   will become undriven.
ERROR:MapLib:661 - LUT3 symbol
   "mytop/n_962/n_961/n_955/nSCTL_L48175572_275_932/n_918/Mmux_sel033fd08c_t0b4a
   8b90104_SW12" (output signal=N4408) has input signal
   "mytop/n_962/n_961/n_955/nSCTL_L48175572_275_932/n_918/n_888/xLTHi" which
   will be trimmed. See the trim report for details about why the input signal
   will become undriven.
ERROR:MapLib:661 - LUT4 symbol
   "mytop/n_962/n_961/n_955/nSCTL_L48175572_275_932/n_918/Mmux_sel033fd08c_t0b4a
   8b90111" (output
   signal=mytop/n_962/n_961/n_955/nSCTL_L48175572_275_932/n_918/Mmux_sel033fd08c
   _t0b4a8b901_map1) has input signal
   "mytop/n_962/n_961/n_955/nSCTL_L48175572_275_932/n_918/s000001cc<0>_mand"
   which will be trimmed. See the trim report for details about why the input
   signal will become undriven.

[Eriquito]

Hi JJROBOT,

What version of the LabVIEW FPGA module are you using?  I found three forum threads and a KB on similar issues.  Please take a look at these and see if your problem could be related.  If not, let me know and I will look into this further.

Discussion Forums:
    fpga   [ NEW ]

 FPGA Compile Server Error

 where to find FPGA trim report of the compiler

KnolwedgeBase:
FPGA Xflow Compile Error 2 When Compiling LabVIEW FPGA VI