fpga: dynamic mode vs bind reference to type def

[jyang72211]

For open the FPGA VI reference node, dynamic mode and bind FPGA host reference to type def are mutually exclusive.  I was told that I should use dynamic mode but still create a type def for the reference.  i notice the type def no longer propagate any changes, so I went back to the binding option.  When am I supposed to use what option?  

[Esteban_B]

Hi jyang72211,

I found in the help file for the FPGA Interface that you can use the Dynamic FPGA Interface when working with different FPGA VIs of bitfiles, when the communication hardware interface to the host is compabile. The communication hardware interface includes the following:

• Names and types of controls and indicators
• Names, data types and types of DMA or peer to peer FIFO’s
• Names, directions, and types of target-specific methods.

Regards,

[jyang72211]

That's not my question at all.

[Dragis]

The Dynamic Mode of the Host Interface reference allows you to reuse the same interface across multiple FPGA applications. It has features similar to LabVIEW classes that allows you to pass more specific references to VIs that only need a subset of the functionality among other things that make writing host VIs a bit simpler. New functionality for the Host Interface will probably only show up with the new dynamic mode.

Many people still create a typedef for certain configurations of a dynamic mode wire. For instance, let's assume that you have a VI that only requires access to a DMA FIFO called "Foo". You can create a reference that requires exactly that set of methods and typedef that reference so you can reuse it for all sub-VIs in that hieararchy. If you ever decide you need another method, you can just add it to that typedef and your hierarchy is updated.

Binding to a typedef It is a very similar concept left over from the very tightly coupled static mode references, but with dynamic mode you generally end up with a plurality of more specialized typedefs so binding to a single typedef was no longer sufficient. Hopefully, with appropriate use of specialized dynamic mode typedefs and the smart type propagation of references across VIs the dynamic mode will be a more pleasant experience.

[jyang72211]

When I make a change to my type-def FPGA reference, why is the change not propagated to all VIs when dynamic mode is used?

[Dragis]

Just to make sure I understand, you are saying that you have a typedef that contains a dynamic mode reference that a set of VIs use. When you change the configuration of that reference inside the typedef the typedef does not properly update throughout your linked VIs?

[jyang72211]

That's correct.

[T-REX$]

Hey jyang,

Can you post some example code of this for us to check out? The type should definitely propegate through when you make a change to the typedef.