07-14-2008 12:38 PM
Express VI's got put in around LV 7 or 7.1 to be able to get people started in LabVIEW programming faster. While many of them let you do quite a bit of customization, there are still inherent limits as to what they can do. And for simple tasks like the boolean, the extra code is just overkill.
You should be able to easily control the delay. You can programmatically determine how much of a waveform to append to the front. You can initialize an array or build a waveform of 100 zero's, or 1000 zero's, or whatever you calculate is necessary in your code. Browse through the Array and Waveform palletes and you'll discover a lot of functions that I think will be useful to you.
Feel free to post in this thread if you have related questions, or start a new thread for a different question if you become stuck.
Good luck on your project.
07-15-2008 09:43 AM
07-15-2008 11:20 AM - edited 07-15-2008 11:22 AM
BMEstudent wrote:
Hello again. This is what I came up with to delay my signal. The case structure is wired to the case that the big while loop surrrounding the entire VI is on its first iteration, and the false case has nothing wired through it. The error says that the tunnel is not wired (the tunnel leading to the initial condition for the feedback node just below the case structure). I only want the delay to apply once so I think that this is the way to do it....? What must I wire to the tunnel in the false case? I think this is where it is going awry.Go into the false case, right click on the tunnel and select create constant. What you would want is an array of doubles that is empty.Similar ideas have led to the problem that I am having the most trouble with, which is that the final output waaveform (switch output) should only read one point per iteration of the big loop. This is problematic because the delay is creating an array and it knows the values and just plots them all in one iteration. I am not sure how to 'index' (right word??) the values being output at the NOT AND feedback section and start running the big loop with zeros and eventually (at some iteration down the road) catch up with the processed signal, thus creating the delay.I'm not clear on what you are trying to do here. The screenshot of a partial block diagram isn't enough to figure this out. Please post the entire VI.
07-15-2008 01:38 PM
here are some screen shots of the FP with the working switch and the erroneous, with the constant wired in the false case, along with the VI. I commented out some parts of the program that are superfluous, so it probably won't work without them back in, but just so you know where the important data is flowing. in any case I have a partner VI that runs at the same time opening the data files and then the DAQ assistant here reads the data that is output. see what you think. Thank you so much for all of this help.
pmn
07-16-2008 09:53 AM
07-16-2008 02:09 PM