compact rio fifo

[tomnz]

I have been testing the FIFO DMA method without much success. I have copied the NI example and you can see the Target and Hostcode attached. I am reading a 4 channel 9234 A/D. What I get out is nothing at all and I get a FIFO overflow every time. (which stops the host program).

Am I doing anything wrong that is obvious? I can post the vis if nescessary. I am using a CRIO 9022 and a 9114 chassis.

regards

Tom

[preston_johnson]

1) you have NO error handling - if you did you will find you did not

a) set the sampling rate

b) did not start the module

Consider using one of these reference designs when working with the 9234 or other DSA and high speed SAR modules

http://sine.ni.com/nips/cds/view/p/lang/en/nid/209114

http://zone.ni.com/devzone/cda/epd/p/id/6388

[tomnz]

Thanks for the link, but I used an NI example to get that program!! It's not at all obvious to newcomers of this technology which programs apply to which hardware.

Some of the explanations on the net refer to much earlier versions of the FPGA software as well.

As for the sampling rate, I set the sampling interval on the FPGA ie the loop timing, is this not the same thing or are you saying that there is a separate sampling rate

input somewhere? are you also saying that the code I had will never work on this hardware or just that it will not be optimal?

[preston_johnson · Accepted solution]

The 9234 is a DSA device (Delta Sigma ADC), and is clocked NOT by the FPGA clock, but by its own internal clock.  The 9234 has built in anti-aliasing filters, which track the sample rate used by its own internal clock. 

If you do not set a specific sampling rate, then the 9234 board will run at its fastest rate - 51.2KHz.  Its Anti-Aliasing filter moves to about 22kHz.  If you do not start it on the FPGA, then no data is produced. 

Check out the waveform reference link (first one above) and see the best practice for using DSA modules in FPGA. 

If you check the error code from your IO node, you will see that that the module has not been started (in your code). 

[tomnz]

That's great, thanks for your reply.

[tomnz]

It's all working now. Just one small question, I have a 9263 D/A module in slot 2 and the 9234 sigma delta in slot 1.

The sigma delta is now working fine on all 4 channels. As a test I wish to send out all analog inputs to the 9234 outputs.

Do the clocks need to be synchronized?

Thanks

[preston_johnson]

No, the clocks do not need to be syncrhonzed, although you could.  (You would want to export the clock from the 9234 module and use it to time your AO loop). 

Simply put the 9263 in a separate loop that is software timed at the rate you want.  You can use the function generator on the FPGA to create a sinewave or something else.