always setting outputs to zero

[mha2010]

Hi,

   I would generally use a cDAQ, but the problem can be defined generally.

   An analog output is only updated when a labview app is writting to it. If the USB connection of cDAQ is lost, then the outputs become zero for protection. This is so far desired.

   Now, suppose the labview application crashes, or the whole pc is suddenly turned off, or the labview app's process is ended, for protection again, it is desired that the analog outputs turn zero. They don't.

   There can be an extra piece of hardware doing extra control over the subject, but still not preferred.

   Does anybody have a software solution or a solution within cDAQ for this?

Thanks

[falkpl]

you can implement a watchdog architecture,  when the host application is running the watchdor is piriodically reset, when the connection is lost the watchdog can expire and the voltage is set to zero (safe state)  I could not fully understand your question but ZI would use a watchdog to make sure the pc is connected.

[falkpl]

sorry, I thought you said cRio not cDaq.

[mha2010]

yes, watchdog is one solution. As far as I know, cDAQ doesn't have a watchdog, as I guess you were confirming. Again, if the sfotware crashes, there would be no control over it unless by hardware.

Another point is, the watchdog is already used in the whole system, and this is some sort of over protection on cDAQ outputs.

Can there be some innovative solutions?

[moderator1983]

If you're programmatically existing (aborting) LabVIEW application instance, then it can be handled. But as you said, if LabVIEW crashes, I dont know if there's any possible way to handle that.

[mha2010]

I was trying to implement the following solution, but I couldn't understand exactly how the onboard buffering stuff works, or if it is possible to do so.

So, the plan is to do this:

assume we have a waveform (or array) with values: VO, VO, Vsafe

where VO is the desired output, and Vsafe is the safe output.

if software is running regularly,

I would like to rewrite that waveform, or restart the generation somehow, so we never reach the Vsafe...

if software is not running regularly,

the waveform will be generated till the end, which is Vsafe.

I have a cDAQ9172, with the following modules

9263

9264

9203

9205

9421

9476

9472

9725