Why does the new cRIO-9076 not support the Scan Engine?

[viScience]

I had spec'd out one the new spiffy cRIO-9076 chassis but learned that despite it's impressive capabilities, it does not support the Scan Engine.

I am curious to know why this is.  I hope this is not a indication of NI backing away from the Scan Engine and maybe NSV technology as well.

[jpaul]

Sachsm,

As of the new NI-RIO 4.0 driver released at NIWeek the cRIO-9076 does now support scan engine. The reason scan engine support was not included in the initial drive release was due to a software timing issue that we wanted to meet strict requirements. Unfortunately those requirements were not met in time for the first release, but again the scan engine is now supported in NI-RIO 4.0.

I hope this helps and let me know if you have any follow up questions.

[viScience]

Hi Johah,

Does the cRIO-9075 also support the scan engine in NI-RIO 4.0?  If so then could you tell me how to adjust the metrics that state a cRIO FPGA must have at lease 2M gates

to use the scan engine for those FPGA that are sized in logic cells.  Also, could you help me determine roughly how much fabric is left over for hybrid mode design.

BTW, I was at NIWEEK and was disappointed to not hear a single word about the future of the scan engine or NSV technology.  Any noteworthy improvements in RIO 4.0 or on the future roadmap?

[J.Harv]

Hi Sachsm-

     Yes, both the NI 9075/9076 have support for Scan Interface Mode when used with NI-RIO 4.0.  As for sizing between gates and logic cells, there really isn't a convenient way to map one to the other.  Thus, the previous rule of thumb that required 2M gates does not translate.  Since we now have several different types/families of Xilinx FPGAs, it is not longer as simple as specifying a logic cell amount.  The logic cells on a Spartan-6 are much different than the logic cells on a Virtex-5.  Most of the chassis that we release can support full scan mode. The only way to know for sure is by checking the following support page: 

Software Support for CompactRIO, CompactDAQ, Single-Board RIO, R Series, FlexRIO, and EtherCAT

     So, determining how much fabric is left over for a hybrid design after scan mode has been implemented is not that simple either.  In a hybrid design, you could implement one or two modules, or the entire chassis full of modules.  Each module will require code that takes space on the FPGA, and different types of modules will require slightly different amounts of fabric.  In addition, each modules fabric usage will be slightly different between types/families of FPGAs.  The only way to know for sure is to try it out!  You don't actually need the hardware ahead of time to compile a project and look at the usage.  You could get an eval version of LabVIEW 2011 and NI-RIO 4.0 and compile the project with your specifics. This method will work well if you have all of the final code ready to test to test.  For instance, if you were just moving to a new type of target with existing code and wanted to check.  However, be careful with these results.  If you only add the modules trying to determine the remaining space, the Xilinx compiler has no reason to optimize because the FPGA isn't near full and the resulting usage may be higher than it would be with your code added in the mix. 

    I hope that gives you some direction to go in. Just let us know if there are any additional questions.

Regards,

John Harvey

NI-RIO Product Support Engineer

[viScience]

I installed LabVIEW 2011 with the RIO 4.0 drivers but I cannot set the cRIO-9076 to scan engine mode, any suggestions?

[viScience · Accepted solution]

Ok, uninstalled and reinstalled NI-RIO 4.0 and now all is well, guess it was just one of those inexplicable installation issues.

[viScience]

According to the chart the sbRIO 9623 and 9626 which use the same FPGA LX25 and LX40 as the cRIO-9076 are not compatiable with the scan engine.  Is that correct?  I would think that NI's latest sbRIO boards would be able to be used with softmotion which requires the scan engine.