What are LOCed IOBs?

[pd2]

I don't know what the parts on the device utilization summary of an FPGA compile are. Here is my FPGA compile summary:

Status: Compilation successful.

Compilation Summary
-------------------

Device Utilization Summary:
   Number of BUFGMUXs                        7 out of 16     43%
   Number of External IOBs                 403 out of 556    72%
      Number of LOCed IOBs                 403 out of 403   100%
   Number of MULT18X18s                      8 out of 136     5%
   Number of RAMB16s                        73 out of 136    53%
   Number of SLICEs                       2837 out of 13696  20%

Clock Rates: (Requested rates are adjusted for jitter and accuracy) 
  Base clock: Configuration_Clk
      Requested Rate:      20.000000MHz 
      Theoretical Maximum: 60.299083MHz
  Base clock: ADC_0_Port_A_Clk
      Requested Rate:      25.001250MHz 
      Theoretical Maximum: 26.204077MHz



Start Time: 7/14/2008 8:36:14 PM
End Time: 7/14/2008 9:15:49 PM

Can anyone tell me what BUFGMUXs, external and LOCed IOBs, and RAMB16s are? Thanks

[andre.buurman@carya]

Google for " FPGA+term you would like to know".

[Eli_S]

Hi,

The terms you are asking about are all referring to parts of the FPGA architecture. You may be able to find specific information about these terms at the Xilinx Support Page.

[andre.buurman@carya]

When using the google method I suggested the first results are of the xilinx website explaining the terms.