Hello, I'm working on a control system for a scanning tunneling microscope, and need to implement an ultrafast PID control- preferably on our NI-7833R FPGA module.
So far, I've got an analog input loop, and a PID loop running at 200 ticks (about 5us). With the discrete PID controller in the FPGA module, I've only managed to use proportional and integral gains of 1 [I16], anything else brings the PID to saturation. The problem is that even these smallest possible value of PID gains makes my system highly unstable. So my question is:
- Is it possible to use this discrete PID controller at this high speed?
- Would it help to keep the sampling at max (5us), and slow the PID output down by eg a running average?
- Do anyone have any other suggestions on how to implement this?
Looking forward to your answers!