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Timing violation FPGA


Attached a project I wrote with Labview 2011 FPGA. The has a while loop that running other 3 sub vis.

During compilation I got "Timing error". I follow all the advices in the help to overcome this error, but none of then help.

Please advice.



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Message 1 of 4

Unfortunately this is life in the FPGA world - you need to rework your code until it meets timing.  I don't immediately understand what your code is doing so I can't offer specific suggestions, but I would try the following:

1) Don't write to the AO channels in the first sequence of the frame.  The compiler may be smart enough to determine that no arbitration is necessary in this case, but on FPGA it is always a good idea to make sure that you only write to and read from a resource (such as an input or output) in a single location.  If you need to initialize the values, use a "First Call" function.

2) Similarly, avoid using multiple copies of local variables.  In your case this will definitely lead to extra arbitration code because you are using the same local variable in two loops.

3) If possible, convert your loops to single-cycle timed loop.

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Thanks for the advices.

Is there any paper with more rules for good FPGA programming?



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Message 3 of 4

I don't know of one single document, but many of these points are mentioned in the LabVIEW FPGA module help.

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