Timed loop mode

[aetc]

The 'Expected Start [i]' output of left-side node in a timed loop becomes '-1' when the mode into the right-side node is changed (dynamically) from 'No change' (i.e. the default) to 'Discard missed periods, ignore original phase' (same as original input). I would think that it would revert back to the value it was showing before.