Hi fathurrkoesn,
@fathurrkoesn wrote:
Is it possible to simulating analog input and analog output in labview fpga target using simulated I/O in same time?
Yes.
(What's the point in simulating AO? It's the same as NULL )
Best regards,
GerdW
using LV2016/2019/2021 on Win10/11+cRIO, TestStand2016/2019