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Shared variables use for CRIo 9074

Hi All,

 

I have recently started working on NI CRio 9074. I have C series modules for AI, Ao and DIO signals. I am trying to develop a siimple application for switchin on a powers Supply and acquiring its voltage and current signals. I tried testing simple projects on RT-FPGA communication and they have worked till now. But now I am trying to develop Host-RT- FPGA link. I used shared variables for communicating set points from Host to RT but  some how shared variable are not able to communicate. In debug mode I am seeing that in RT the value of these variables is "0". Also certain signals from RT like actual current is being transferred on Host through shared variables.

So I am confused if I am doing any mstake in configuring these shared variables. I am attaching my project. Please provide your view points on it.

 

Thanks.

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I am not sure if you still need help or not, but you did not include the shared variable library in your zip file, so we cannot check that.

 

I dont have the FGPA module installed, but I do have Real tIme installed, so I could look at your RT_vi.vi.  One suggestion, you should either make the While Loop a timed loop or put a Wait_ms in the normal While loop to give me cRIO time to process.  Yes, it is a simple vi, but if the CPU is running flat out trying to run that loop, some of your lower priority tasks (aka transferring data over the network) might get lost.

Kenny

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