Questions about corruption of RT VI in the LV project

[TCPIP]

I am using LV 8.2 and I opened a LV project that involves RT and FPGA. The FPGA is cRIO 9004 with C series modules slots.

I have the host PC VI, the RT VI and the FPGA VI in the LV project.

Once, when I am using the LV, when there is an error that  forces me to close all the LV application, and I choose not to report this error to window, when I open LV and the corresponding project again, it asks me to recover or cancel (not to recover) , I choose cancel. And after that, once I compiled and run the RT VI ( the RT VI will run the FPGA VI), it takes an EXTRA LONG TIME to deploy the RT VI to the RT.

  When I encounter such problem, I always open a new project , copy all the correpsding network variable, VI..... to the new project folder, compile the FPGA VI again and such problem is solved, Do I have any other better alternatives to do the same thing.

[TMC-NI]

Hi TCPIP,

This seems to be a LabVIEW error.  We encourage users to actually report these errors to National Instruments once it happens (you do not have to report it each time it happens).  This will actually create a service request automatically, and an applications engineer would be able to assist you possibly with a workaround and possibly with information for the LabVIEW version with a version fix. 

Would you be able to provide more information on the error?  Is there a corresponding cpp code, error name etc. that would allow us to assist you further?