Quadrature encoder position acquisition on FPGA using the NI-9361

[2528642245@qq.com]

I’d like to ask you about reading quadrature encoder position signals in an FPGA environment using the NI-9361. In X4 mode, I followed the example program to write my code, but I still cannot get any data. I am using a loop timer together with a flat sequence structure to form a timed loop for acquiring the position signal.I’m very sorry that I only have a Chinese version. I hope to get help from everyone!

[2528642245@qq.com]

Hello XM34,

I would like to ask you about using the NI9361 to read the quadrature encoder position signal in an FPGA environment. In X4 mode, I have been following the example code, but I am unable to obtain any data. If possible, could you please share your program as a reference? Thank you very much!!!

[ZYOng]

What model of cRIO are you using? If you are using cRIO-904x/5x, you can test with Real-Time DAQmx mode first.

How did you connect the sensors? Can you show a wire diagram? By any chance, if the wiring works for Scan Engine or DAQmx mode?

[2528642245@qq.com]

Thank you for your reply, ZYOng! I am using the CRIO-9043. My sensor is a Renishaw optical displacement sensor with a total of 6 wires, and the wiring details are shown in the diagram. According to the NI-9361 datasheet, counter 0 is connected with A and B to DI0 and DI4, respectively. I will try testing with DAQmx, but ultimately I still need to read the data in the FPGA environment.

[ZYOng]

Make sure the connection works with DAQmx mode before implementing with FPGA mode.

Did you connect an external power supply?

[2528642245@qq.com]

Yes, I have connected the external power supply, and the sensor shows normal power supply. Also, during the recent DAQmx test, with the same wiring setup, I was able to collect data normally. However, since the sampling rate of DAQmx does not meet the requirements, I need to implement it in the FPGA.

[2528642245@qq.com]

It works fine in DAQmx, so I believe the issue is with my FPGA program. The difference between my setup and the example is that I configured the I/O method for the NI-9361 module in the FPGA project properties, setting it to "Quadrature Encoder Position," instead of doing it inside the VI.