Quadrature Decoding

[Ambrose1464]

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@GerdW wrote:

It's again a LV2015 VI. Please upload a downconverted version…

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Sorry. here it is the LV 2014 vi.

[GerdW]

Hi Ambrose,

according to the tables shown in the linked Wikipedia article you need this logic:

IF RisingEdge(A) AND B THEN "count up"
IF FallingEdge(A) AND NOT(B) THEN "count up"
IF FallingEdge(B) AND A THEN "count up"
IF RisingEdge(B) AND NOT(A) THEN "count up"

IF FallingEdge(A) AND B THEN "count down"
IF RisingEdge(A) AND NOT(B) THEN "count down"
IF RisingEdge(B) AND A THEN "count down"
IF FallingEdge(B) AND NOT(A) THEN "count down"

You can combine those IF-THEN statements when ORing their conditions…

To detect edges on A or B you could use the BooleanCrossing function!

[Ambrose1464]

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@GerdW wrote:

Hi Ambrose,

according to the tables shown in the linked Wikipedia article you need this logic:

IF RisingEdge(A) AND B THEN "count up"
IF FallingEdge(A) AND NOT(B) THEN "count up"
IF FallingEdge(B) AND A THEN "count up"
IF RisingEdge(B) AND NOT(A) THEN "count up"

IF FallingEdge(A) AND B THEN "count down"
IF RisingEdge(A) AND NOT(B) THEN "count down"
IF RisingEdge(B) AND A THEN "count down"
IF FallingEdge(B) AND NOT(A) THEN "count down"

You can combine those IF-THEN statements when ORing their conditions…

To detect edges on A or B you could use the BooleanCrossing function!

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I need to implement this vi on my fpga, is it effective? I feel take many resounces and the boolean crossing function I dunno how to use although i see the detailed help then that why I din implement on my vi. Mind you draw an example vi for me ? Thank you.

[GerdW]

Hi Ambrose,

it's the first time you mention the FPGA part…

The BooleanCrossing function is not available on the FPGA, use a feedback node with a boolean function instead (as shown before, so there's no need to attach another snippet). All the remaining comparisons are quite "small" on the FPGA!

[Ambrose1464]

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@GerdW wrote:

Hi Ambrose,

it's the first time you mention the FPGA part…

The BooleanCrossing function is not available on the FPGA, use a feedback node with a boolean function instead (as shown before, so there's no need to attach another snippet). All the remaining comparisons are quite "small" on the FPGA!

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Let ignore the FPGA part first, from the picture below, i currently having the problem is detect the edge of A and B during A lack B case. Because A lead B i can compare the rising edge of channel A in the same time, then the A lack B case I dunno how to function it since the falling edge of channel A is not at the same time when A lack B. Currently i can produce the output because i direct set into 2 mode which A lead B and A lack B which din not detect the edge of the A and B. 

[GerdW]

Hi Ambrose,

it's nice to show some FP artwork, but without knowing your current VI we cannot troubleshoot your problem! (You know I prefer LV2014, don't you?)

Did you implement the IF-THEN logic I told you before?

Btw. use "lag" instead of "lack" 😄

[Ambrose1464]

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@GerdW wrote:

Hi Ambrose,

it's nice to show some FP artwork, but without knowing your current VI we cannot troubleshoot your problem! (You know I prefer LV2014, don't you?)

Did you implement the IF-THEN logic I told you before?

Btw. use "lag" instead of "lack" 😄

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I test already. I feel that is the problem of timing. If can try modify my vi see how it works. Thank you.

[GerdW]

Hi Ambrose,

you need to implement ALL conditions.

And you need to implenent the edge detection in your main loop - do not hide them inside case structures (THINK DATAFLOW!)…

[dkfire]

There is some fundamentel that you need to look. 
You need to take a step back and look at your signals, and look at the wiki and the text code that GerdW posted. 

Lets take the first step. 

When A leads B you need to count up. 

When A lag B you need to count down. 

We start by only look at the signals when A changes from False to True, a rising edge. 

What is the value of B, when A leads B ? 

What is the value of B, when A lag B? 

( Dont use your mode button for the counting, only rely on the signals)