I have a VI that interfaces with an FPGA using the following process:
1) Vi opens a configuration file and reads an equation Fx(X,Y)=Z.
2) The Vi runs the equation and creates a block of memory (Mz) of Z from (0,0) to (300,300).
3) The Vi uploads Mz to the FPGA
4) The FPGA takes signal inputs, runs them through Mz, and returns modified data.
Currently, I have a working system for this process. However, for step 3 I use a FIFO to construct Mz on the FPGA. However, this uses a Host to target FIFO slot that would be otherwise available.
Is there a way to configure the memory inside the FPGA at initialization without using a FIFO in this way?
I know this menu works in the project to set initial values before compilation, but is there a programmatic way to do this after the FPGA and VI are complied?
Considerations:
- The VI will be compiled into an exe.
- The configuration file will change every 3 months.