Probe not executing in running VI

[ViT()]

Hi, I have some VI (not all) of an RT project on C-RIO 9014 that are correctly running and updating the front panel indicator: but if I set a probe on that indicator wire the prove value is "not executed".

This happens on every wire of the VI.

The execution properties obviously allow debugging, I could not manage to get out the difference between theese VI's and the companions in the project correctly working.

thanks,

Vittorio 

[GerdW]

Hi Vittorio,

probes tend to not working correctly when using them on RT VIs. I usually have problems when probing array wires...

[ViT()]

Hi GerdW,

my probe problem is related to the VI not to the type, cause on the same RT project few VIs has not working probes (every wire),  and in other VIs probes work fine.

Vittorio 

[Himanshu_Goyal]

Hi Vittorio,

Check in VI Properties the Reentrant Execution check box. this should not be check mark.

[Sami88]

Hi,

I also have the same problem and I have nonreentrant execution in my propertis but still the probe shows that program is not executed though the values are updated and changing! Any help is appreciated.

BR,

Sami

[JensG69]

The VI is running in the Real Time part of the cRIO and not the FPGA?

Regards, Jens

[P@Anand]

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@Sami88 wrote:

Hi,

I also have the same problem and I have nonreentrant execution in my propertis but still the probe shows that program is not executed though the values are updated and changing! Any help is appreciated.

BR,

Sami

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Please start a new thread for your issue. Aslo show us the code and tell where exactly you are facing the problem.

[Sami88]

The VI is running in the FPGA part. Actually I am using the C-RIO 9024 and trying to use the 9505 module for closed loop speed control example with minor modifications.

[RichardS_Dynex]

I don't believe probes work for FPGA code running on the FPGA target, only if the target is set to 'Execute VI on Development Computer with Simulated IO', but this doesn't help much if the effort to simulate the external hardware is too high.

To debug FPGA code on the FPGA target, I use registers instead of probes and read them on the RT side for display. Registers use less resources than FPGA indicators.

Richard.