Polynomial calculations in FPGA

[ESturov]

Hi there,

I have a question regarding polynomial evaluation in FPGA. I was planning to use a PtByPt polynomial evaluation system (https://www.ni.com/docs/en-US/bundle/labview-api-ref/page/vi-lib/ptbypt/array-operations-llb/1d-poly...) in my code (second order polynomial). The main reason being that I try to mimic part of my Matlab/Simulink model that contains a polynomial block. The coefficients of the P(x) can be specified as well as the input value.

However, my code is designed in FPGA (mainly in FXP and it's fairly big already), and I could not find any similar vi in FPGA with the same functionality. Am I missing something, or I have only the option of transferring data from the FPGA code to the Host to the polynomial evaluation block and back? I've seen this topic: https://forums.ni.com/t5/LabVIEW/Polynomial-Evaluation-in-FPGA/m-p/3351531#M985130 but not sure that it will suit me, since I concern about its speed and the use of SGL values. Thank you in advance.

[Kyle97330]

Do you have the Fixed-Point Math Library for LabVIEW FPGA?

Can you try using the Add/Multiply VIs in there that use FXP exclusively, and use a FOR loop with a shift register to evaluate it manually?  

If that ends up either too big for your FPGA's available space or insufficiently accurate due to the nature of FXP math combined with whatever coefficients you use, then you may have no choice but to offload the calculation to the host.

[ESturov]

@Kyle97330

Thank you a lot for you suggestion. But could you please point out where I can maybe read about this trick (logic) regarding a FOR loop  with registers? Don't remember that I've ever used it like this.

Maybe from your own experience, how feasible it is to offload calculations to the host code, rather than leave them in FPGA? Just wondering in terms of the calculation speed. Thank you in advance and sorry for the late response.

[vipillai]

This may be helpful (feedback nodes operationally imitate shift registers). 

The clock speed of the FPGA is 40MHz while that of the host and RTOS is slower (1MHz) so it all depends on how fast you need loops to iterate and calculations to be made. 

[ESturov]

@vipillai,

Thank you for the reply, now I see how these calculations can be implemented. However, I’ve realised that I can’t figure out only one point. We run a FOR loop a few times (“n” in the code), but in my case I need constant calculation. When I was trying to put the FOR loop inside a while loop, the results went crazy (not surprisingly though).

So far I've end up with this code, that did not perform well, primarily because the calculation will occur after I hit the Stop button. 

So the question is (and it is a really silly question), where should I put a while loop so the polynomial calculation will be performed every time when my input changes? Because in a real system I constantly measure one parameter, that will be basically the input to this polynomial calculation. Thank you if you have any ideas how to sort it out.

[GerdW · Accepted solution]

Hi E,

try something like this:

[ESturov]

@ GerdW,

As always the simplest solution is the best one, thank you for your help. Works perfectly fine, especially since my polynomial is fairly simple. Have a good one.