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PID (FPGA) Gain Values

Thanks folks for the advices.

I tried arround with all gains, including the sampling time.
Now i got it in a stabil movement.
What i not understand is, where is the difference between the sampling time Ts and the timer of the loop.

In my system i want to move a piston with a linear motor. My program creates diffent kind of waves (sine, square, triangle).
Each wave is discribed by 180 values and runs with max 10Hz. That means with max frequency, the stapoint frequency is 1.8kHz.
(every 560 usec a new value).
In my opinion the PID loop should run ten times faster. That doesnt work. I cant put this time in the PID module for Ts.
I thik this value is for the calculations for I.Gain and D-Gain!?
But running the loop with that time, the system (50usec) is unstabil....
I am a little bit confuesd.

The picture shows you my response of the system.
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Message 11 of 17
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Hi again,

i created another picture to make clear what my problem with the timer of the loop and the sampling time is.

If i run the system i cant change the sampling time of the PID!?
Or is the PID calculating with the timer of the loop when it runs?

How can i define what 1 Tick is in real time? I´m not sure if my advicements are right.

Thanks.
  Andi
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Message 12 of 17
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Good morning,

I think your main problem is that the sampling time is too high. Don´t know if the Ts on the PID vi is the real or an stimated sampling time in order to do a rescaling. Now I´m working with a PID to control a system drived by a DC motor and I had problems with the Ki gain. I don´t know if you have access to the integral part of the PID with that VI, but if you have it you can use an antiwind up strategy in order to reduce as much as possible the overshoot ot the system.
Also, if it´s possible, try to use smaller sampling time (at least in the PID loop) to avoid the overshoot due to the integral part.
Finally, you can check this sample http://zone.ni.com/devzone/cda/tut/p/id/6143 . Maybe you aren´t using a CRIO, but you can use the PID VI in the FPGA VI, because it´s more complete than the one you are using, and it has an PID input (Ilim) to limit the integral effect so you could have better control of the system.

Best regards.
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Message 13 of 17
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Hi,

i think, now i understand whats going wrong with my system.

You are right, my sampling time is to high. When your while loop runs faster than your sampling time of the fpga is, your system goes crazy.
That makes sense, because the I-Gain is calculaiting during the P-gain is changing. The reason for that is that the in the calculations the Ts is missing.

Unfortunately i cant use the antiwindup function on the FPGA. 
I will try to decrease the sampling time to 1e-5.
If i´m succesful, i wil post it.

But you helped me a lot... (we have really the same problems)

Andi
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Message 14 of 17
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HI,

my conclusion now is, that you cant set Ts (Sampling time) to less than 1ms.
You can insert a smaller value, but it´s not running with it.
In "Using the PID Software" stands, that the PID Control VI´s can execute at kHz rates.

I will now program a logic which creates me for every amplitude an frequncy the right values
to decimate my offset and which gives the motors the best performance.

Therefor i have to test the system and note the values.
Not the best way, but it is a simple and safety solution.

Cheers
  Andi
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Message 15 of 17
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Good morning.

Actually, you can use sampling time less than 1ms. I use 20kHz of sampling time without problems (and I think I can go further with little changes of my VI, but I don´t need so much speed). I´m attaching you my PID solution. This is the algorithm of an PID with antiwindup. The good thing (for me) is the "Divisor Ki (2^n)". With that control, I can use decimal Ki, instead of just integer values. The fpga works with integer numbers, but dividing the integer part for 2^n I can use something like decimal values (first multiplicate and after divide for 2^n) and increasing the denominator, the integer part doesn´t trip.
Also, I have implemented an antiwindup for the integer part (one of those coerced blocks) and a final saturation to have my maximun output value. With the divisor of the Ki I don´t need now the antiwindup, but I have implemented it because is easy and maybe I need it on the future.
I had (think) the same problems that you have with the oscillation of the my system, but now with that algorithm it works fine changing the n value.

Hope it helped, best regards.
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Message 16 of 17
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Thanks for publishing your algorithm.
I got now my system in a stable movement.
I´m running out of time for this project so i cant implement your
solution to test it.
But may be in the future, the i will give you a feedback.

Cheers
   Andi
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Message 17 of 17
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