NI 9205 differential inputs read by FPGA IO node

[Neil.Pate]

Hi all,

So I have a cRIO with several C series modules one of which is a NI 9205 AI. I want to configure the 9205 with 16 differential inputs, (read by the FPGA). I am a bit confused as to what channels to actually read in the IO node when the channels are differential. From the datasheet it looks like the channels I should be reading in my FPGA IO node are: 0, 1, 2, 3, 4, 5, 6, 7, 16, 17, 18, 19, 20, 21, 22 and 23.

Is this correct?

[crossrulz]

That looks correct to me.  You may need to use a module property node to set the inputs to be differential or it might be set up in the project.  I would have to try an experiment to make sure.

[Neil.Pate]

Thanks crossrulz,

I have indeed modified the module channel configuration in the project. Interesting, it is not possible to set, for example, AI8 to DIFF mode, which does confirm my suspicions.

Unfortunately I have the cRIO and module, but not connector block so I cannot easily get a test signal into my system to check this out.

What I have tested is that it is possible to generate FPGA code that reads all 32 channels, i.e. AI0..31 even though some are configured as differential. I have no idea what is measured if I try and read AI8. The output looks very similar to my other channels which have nothing connected to them at the moment.