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Most efficient way to calculate even parity bit in FPGA

Hi,

 

I think the most effective way to calculate parity bit is by XOR ing each bit and the final value will be the parity bit.

What is the best and most inefficiency way to implement it?

 

Like below:

11001100

0XR1 =1
1XR 1=0
0XR0= 0
0XR0=0
0XR1=1
1XR1=0
0XR0= 0
0XR0=0= parity bit

 

 

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Something like this?

XOR.png

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Are you just dealing with 8 bits?  How quickly do you really need this calculated?  Efficiency in software is typically a balancing act.  Do you want the least amount of FPGA fabric or the fastest possible or the simplest to code?  In most circumstances, I would just use a FOR loop with an XOR and shift register.  In FPGA I would change to a SCTL, which would add a little more that you would have to code (loop stop condition).



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Another possibility, if you have the space, is to create a lookup table for each of the 256 possibilities an 8 byte integer would have and pre-calculate whether it would be even or odd parity.  I know that concept is sometimes suggested for checksum calculations.  It might help here also.

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