Making Convolutional Interleaver Xilinx Core IP work

[scps]

Hi all,

I have been trying to get the Convolutional Interleaver core IP by Xilinx to work but I have not succeeded so far. I am attaching snapshot of my test program here.

I am writing 1's and 0's to the FIFO in host and reading the data in the target. For the first valid data which happens to be 1, I am getting data_out_v as FALSE and FALSE whereas I am expecting TRUE and TRUE to be the outputs. Also, RDY and RFD flags are returning FALSE. What am I doing wrong here?

I would also like to know if I can use this convolutional encoder IP in a for loop. I have a byte as input to the encoder which I am unpacking into bits. If I put enocder in a for loop and run it for 8 times, I would be able to get encoded bits for all the 8 bits. Am I allowed to do this or are there any better methods? Please help me solve this.

Thanks in advance,

Sharath