Labview FPGA While loop (First call? VI) Question

[ArisEnding]

Hi sirs!

I am currently creating a LabVIEW FPGA VI which is contained in a WHILE loop. It has a First Call? VI wherein, in the first occurence of the loop, a variable should be initialized to a certain value. However, when I embed the VI into the FPGA, it would seem that the First Call? VI was not called. I also tried implementing this through shift registers where the register is initialized outside of the WHILE loop. However, the result is still the same. May I ask how LabVIEW FPGA functions when it comes to WHILE loop? Thank you very much!

[crossrulz]

Can you share some code that shows this behavior?  I have yet ran into an issue with these structures.

[Thoric · Accepted solution]

For a reason I can't recall I've avoided the use of the FirstCall in FPGA and instead I use a shift register boolean, wire a True into the lefthand terminal, and a False within the While loop to the righthand terminal. Therefore you get a True for the first iteration only, in exactly the same way as the FirstCall function. It might even use fewer resources on the FPGA?

[Dragis]

The First Call? primitive should work properly (within the specifications of the language). A snippet of the code would be useful, as well as which target you are running on, etc. Also, have you tried running the application on the desktop  (i.e. execute on development computer)?