09-06-2007 09:35 AM
Hi subdew,
about a year ago (long enough to not remeber too well
) I used the VHDL node with LabVIEW FPGA 1.1. I remember, that I had some startup difficulties with external files. If I remember that right, it was an issue of absolute and relative paths.
I had some problems with the generics as well, but I think if have to meditate a little while to remember how I have solved that. ![]()
An issue that used to be quite annoying with this old version was the fact, that the VHDL node was limited to 28 terminals or so. Afaik, LabVIEW versions 8 have solved this.
I don't know if this really helps, but I'll post as soon as I've checked!
Regards
Oliver
05-23-2008 11:51 AM
kindly, tell me where can i find the HDL Interface Node ? is it available on labview student version 8.5 ?? I want to see the ouputs of my vhdl ports on labview so that i can do functional checking of the code/test bench.
I have both the test bench and code in vhdl and the code is all about the circuit which has simple logic gates connected to each other.
I want to check the output ( logically using numerical indicator or graph ).... let me know if its possible.
05-26-2008 12:43 AM
Hi Miaa,
in order to work with the HDL node, you must have the FPGA module installed. I don't know, if it comes along with the student version. If it does, check the FPGA palettes; unfortunately I haven't worked with the 8.5 FPGA module yet.
Regards
Oli
05-28-2008 08:56 AM
Hi Miaa,
The student addition of LabVIEW unfortunately does not have the FPGA module included; however, many universities have licenses available for students to use. Please let me know what university you are attending and I can point you to your university contact for National Instruments software.
Once you receive the FPGA module the HDL Interface Node is located in the Functions Palette (block diagram) >> Programming >> Advanced. However, in order to use/locate this function you must create an FPGA project and then create a VI under the FPGA target (in the Project Explorer right click on your FPGA target and select New >> VI) because the HDL Interface Node is not available for use on a normal VI hosted on your PC.
In the meantime, here are a few links that will introduce you to the HDL Interface Node and its capabilities:
HDL Interface Node FAQ
Importing HDL Code into FPGA VIs Using the HDL Interface Node
I hope this helps to point you in the right direction for your development and I look forward to your response. Have a great day!
Cheers,
Jonah
Applications Engineer
National Instruments