LV FPGA XYmultiplot error

[LVD]

Hi guys,

First of all, this is a bug report, and not a question. But I wasn't sure where to put this on the website or forum so I put it here. If this does not belong on the forum, please feel free to remove this post and send me a message where I can put this in the future.

This is the error I get when using a multiplot XY-graph:

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An internal software error has occurred. Please contact National Instruments technical support at ni.com/support with the following information:

Error 1055 occurred at Property Node in nirviObjectToResholderInfo.vi->nirviMakeLineInfoSubTagsForDiagramObjectRef.vi->nirviMakeTreeLineInfoTagForDiagramObjectRef.vi->nirviDiagramObjectError.vi->nirviSplitRegisterListBySize.vi->nirviPrintOneClkFramework_bushold.vi->nirviGetImplementation___busholdModGen.vi->nirviGetImplementation___busholdModGen.vi.ProxyCaller

Possible reason(s):

LabVIEW:  Object reference is invalid.

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and the code you'll find in the attachment. The issue is solved when I use 2 separate waveform charts for the two signals instead of 1. 

Best regards,

Dries

[demux]

Hello Dries,

Thank you for taking the effort and bringing this to our attention.

The error you were seeing is not a bug. It's the build array function in the screenshot which is trying to create one big array which most likely does not fit the FPGA.

Depending on the size of the FPGA on your device, the maximum array size will be limited accordingly.

If the workaround which you found yourself doesn't suffice, decreasing the total size of the array will also most likely make the error go away.

Please let me know if any questions remain.

Kind Regards,

Wouter

National Instruments, Northern Europe

[LVD]

Yes, decreasing the array lenght does make the error go away. I am new to LV FPGA programming so I'm trying a few things out. That is why I will probably (and have already) post more of these stupid things in the future 🙂

Thanks for the clarification!

[demux]

Hi Dries,

Don't worry about posting 'stupid things'. There was no way for you to recognize this behavior and route it back to the size of the array.

From now onwards, this information is available for all our FPGA users to use in case they run into the same error.

Kind Regards,

Wouter

National Instruments, Northern Europe