Jtag/Boundary Scan

[Brian Soerensen]

Hi!

Has anybody made som VI's for JTAG/Boudary Scan??
Some commercial .DLL's are available; but maybe there are someone who
already has made some VI's for this purpose?????

/Brian Soerensen

[calgary]

See this website if your question remains. This company specializes in production integration using DLLs, National Instruments' LabVIEW, LabWindows or TestStand.

http://www.jtag.com

[sumukh]

How to find out if a particular IC is JTAG compatible or not?

Is it through the pins on the IC? (i.e if TDI,TDO/TCK is present or not)

[Karl_Miles]

If the JTAG pins are present then it has a JTAG interface, this can be used for SW Debugger, FPGA programming/Chipscope etc and for JTAG/Boundary Scan testing/programming.

Some devices, mostly processors have a JTAG port just for SW debugging but no Boundary Scan cells behind each pin so you can't use traditional Boundary Scan to test/program the board.

If you look at www.goepel.com they also have a technology called VarioTAP which allows testing/programming through the SW debugger interface, it is very neat as it can switch mode between Boundary Scan mode and SW debugger mode dynamically as required during the test. This is useful for some processors that support Boundary Scan for board testing but need internal Flash programming that can only be done in SW debugger mode.

They are also an NI Select Integrator and have PXI cards to support Boundary Scan.

[BrowningG]

Hi Brian,

Do you need access to the boundary scan (BSCAN) ports and JTAG to implement ChipScope on an NI FPGA target?  NI has a tutorial on adding ChipScope to an R Series board that can be ported to other FPGA devices.  Since NI FPGA targets do not provide access to the JTAG pins on an FPGA this tutorial includes a BSCAN and JTAG interface that can interact with DIO pins available on NI FPGA targets.