How to programmatically adjust/calibrate FPGA clock speed

[Blueprint]

Hi,

I'm programming a system that has a sampling rate of 2kHz. The sampling loop is running asynchronically from a timing synchronization loop, which checks the drift with respect to a PPS and then reports how far behind we are in the sampling loop.

The clock in the Chassis is drifting at about 18 PPM (that is, it counts to 999982 us each second), so I would like to ask the community if I can get any help in calibrating the oscillator real-time at each PPS to remove the drift? 

I appreciate any input:)