How to Read Analog Inputs and Outputs using SBRIO and FPGA

[generalgrant928]

Okay Nanocyte,

The next thing we want to do is to be able to get rid of the FPGA sine wave generator and basically just pass our amplitudes at whatever the DT value is. Some of the waveforms we need to generate aren't just sine waves. Some are triangle, square, and sinewaves. Plus it's inconvient as it sits to pass variables and generate on the FPGA when we can just generate on the microprocessor level and then pass the values and the DT value as well. Then from there the FPGA can output each amplitud at every DT value. However, I know this is going to require to switch the DMA FIFO channel to be a Host-to-Target How do we go about generating waves and just extracting the amplitudes and DT values. Then on the FPGA what's the proper way of passing these values.

Thanks

[nanocyte]

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@brm11 wrote:

Hi Thanks for replying. I believe it is similar issue but I am using the original the deliver and I do have the close FPGA reference at the end. I also added reset node to make sure but it still doesn't work!  

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Just so we are clear, what error are you seeing now. Have you turned on debugging to see where your RTcode is thowing the error? It sounds like it's not hearing back from the FPGA's interupt acknowledgement. You could also try simulating to try and debug the FPGA. You might want to drop the acquiring toggle to see if your FPGA is in the acquiring state.

[nanocyte]

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@generalgrant928 wrote:

Okay Nanocyte,

The next thing we want to do is to be able to get rid of the FPGA sine wave generator and basically just pass our amplitudes at whatever the DT value is. Some of the waveforms we need to generate aren't just sine waves. Some are triangle, square, and sinewaves. Plus it's inconvient as it sits to pass variables and generate on the FPGA when we can just generate on the microprocessor level and then pass the values and the DT value as well. Then from there the FPGA can output each amplitud at every DT value. However, I know this is going to require to switch the DMA FIFO channel to be a Host-to-Target How do we go about generating waves and just extracting the amplitudes and DT values. Then on the FPGA what's the proper way of passing these values.

Thanks

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Look at the "Streaming Data (DMA) UI" example. It has a sine wave selected but you could easily make that a control

C:\Program Files (x86)\National Instruments\LabVIEW 201x\examples\CompactRIO\FPGA Fundamentals\Data Transfer and Storage\Host to Target Transfer\Streaming Data (DMA)\Streaming Data (DMA) UI.vi

[brm11]

I was using the "abort execution" button to stop the RT vi and that was causing the issue. If I use the actual STOP button on the program, it will stop data aquisition and closes the FPGA reference properly and there won't be an error next time running the program.

Thank you very much for your help.

[generalgrant928]

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@nanocyte wrote:

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@generalgrant928 wrote:

Okay Nanocyte,

The next thing we want to do is to be able to get rid of the FPGA sine wave generator and basically just pass our amplitudes at whatever the DT value is. Some of the waveforms we need to generate aren't just sine waves. Some are triangle, square, and sinewaves. Plus it's inconvient as it sits to pass variables and generate on the FPGA when we can just generate on the microprocessor level and then pass the values and the DT value as well. Then from there the FPGA can output each amplitud at every DT value. However, I know this is going to require to switch the DMA FIFO channel to be a Host-to-Target How do we go about generating waves and just extracting the amplitudes and DT values. Then on the FPGA what's the proper way of passing these values.

Thanks

---

Look at the "Streaming Data (DMA) UI" example. It has a sine wave selected but you could easily make that a control

C:\Program Files (x86)\National Instruments\LabVIEW 201x\examples\CompactRIO\FPGA Fundamentals\Data Transfer and Storage\Host to Target Transfer\Streaming Data (DMA)\Streaming Data (DMA) UI.vi

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Okay Nanocyte,

We tried implementing the example into our current software but the values we are getting are really strange. If you look at the screenshot attached the graph we are receiving is the blue. The blue is output A02 on the FPGA where we are utilizing the FXP re-interpret we used last time. Essentially we wany our program to have any waveform signal sent to it. From there we extract the Y valule and the deltaT value and send those the FPGA. From there the FPGA will wait every deltaT value before it sends a new Y. We know our acquire part of the software works as we have tested it previously with a function generator. We set up a couple of different outputs with different methods of how to transmit the data. The AO2 was the only one that seemed to really show anything. I'm just not sure how we can take in a signal and then transmit it properly and accurately. The pic is inside the zip.

[nanocyte]

On the RT side you are writting "loop period (tick)" but it's not hooked up to anything on the FPGA side. That's why your whole waveform is compressed to that tiny amount of time. There's nothing to limit the output on the FPGA and your FIFO is underflowing. Also, your "reinterpret" settings don't make sense to me. Look at my screenshot to see if you can see the difference. You might want to consider changing your datatype to SGL. That way you don't have a rounding error when you convert the DBL array to an I16. You'll also be able to get rid of your reinterpret altogether.