How do I communicate data to a Host VI from an FPGA sub vi without ending the sub vi

[joes51385]

I am trying to send timestamps of events that happen in my FPGA sub vi to be collected by the host vi on a windows computer in Labview 2010.  The trick is that I do not what to stop any of the parallel loops in my sub vi from executing while I do this.  Due to the amount of information collected, I am not sure it is feasible to create an array within the FPGA sub vi to store the data until the end of the trial.  Does anyone know of a solution to this problem?

[dan_u]

I'm not sure I understand correctly, but you can use a Target to Host DMA FIFO to transfer data from a FPGA VI to the Host VI.