Flush FIFO

[Oli_Wachno]

Hi Guys,

sorry for the last dummy message.... seems today my fingers are working faster than my head does... 😉

Does anyone of you know, if there is a way to flush/reset a FIFO on an FPGA target? Doing dummy readings until it is empty is unfortunately no option 😞

Using LV FPGA 7.1 (still) and FIFOs located in BlockRAM. Read out in a SCTL Write (initialization) somewhere before ("normal code")

Have a nice weekend!

Cheers
Oli

[Tobel]

Hi Oliver,
unfortunately dummy readings to empty the FIFO are the only option on the FPGA. There is no special flush-methode available on this target.

Regards, Thomas.

National Instruments Technical Support

Message Edited by Tobel on 12-13-2005 07:38 AM