FlexRIO High Throughput Scripting/Memory question

[ds_1]

Hi,

     I'm using PXie-7966R with 6581 Module and I am attempting to run sequences of large patterns from memory but seem to be running into a speed bottle neck with the DRAM. Basically I want to output vectors from memory to output pins. Base on triggers or stimulus on input pins I which to run different parts of a memory sequence. I want this to be pretty flexible so I can load new patterns to memory, provide start pointers and length counters to the FPGA then get the FGPA to run the sequence base on some logic I can set.

    As a starting point I was trying to run a core SCTL at say, 400MHz and run a pattern at that rate (e.g. a simple AAAA,5555,AAAA,5555.. at first just to check I could run at that speed.)

    As my patterns for memory will be large, and need to repeat in many cases, based on triggers or responses, I don't think a FIFO is suitable. I have been trying to use DRAM but seem to be limited into how fast I can access the DRAM. Is there a suggested way to e.g. pipeline the DRAM to Output at say 300-400MHz? Or some other way I could get the data from memory out to pins on the module?

     Thanks,

       ds1 

[Riv]

Hello,

I wonder if you could decrease the amount of data saved in the memory. For example, if some parts of the pattern are repeatable you could save the small part in FPGA memory and restore the whole pattern online.

Additionally, you wrote you use NI 6581 module. In the manual I see it achieves up to 100 MHz. Although you can run SCTL at that speed, I believe you can output data at 100 MHz at the most.

About the DRAM speed, maybe try storing data as larger data types  (let's say U64). Then you can read such a number, keep it in shift register and output bits one by one in consecutive loop ticks.

Kind regards,

Anna