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Faster ADC needed for CompactRIO
ksmartin
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08-24-2006 05:16 PM
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This probably isn't the correct forum for this but I didn't see a cRIO forum so....
I have an application for which it would be nice to be able to use LabVIEW RT/FPGA on cRIO. However, one of the requirements is that the processing frequency of the system must be 1Mhz. So, the ADC must be at least 1Mhz (even faster would be better). The fastest cRIO digitizer is 800KHz from what I can see.
Questions:
1) Are there any third party Digitizers for CompactRIO which are at least 1MSPS? I know that custom boards can be designed and built but at this point I can't wait for that to happen.
2) If I had such a Digitizer can the CompactRIO system (the FPGA) do any significant processing at a 1MHz rep rate? By "significant processing" I mean a simple feedback loop feeding into a pulse width modulation process.
Thanks,
Kevin
P.S. This system must be a stand alone embedded solution so no PC based solution will do.
I have an application for which it would be nice to be able to use LabVIEW RT/FPGA on cRIO. However, one of the requirements is that the processing frequency of the system must be 1Mhz. So, the ADC must be at least 1Mhz (even faster would be better). The fastest cRIO digitizer is 800KHz from what I can see.
Questions:
1) Are there any third party Digitizers for CompactRIO which are at least 1MSPS? I know that custom boards can be designed and built but at this point I can't wait for that to happen.
2) If I had such a Digitizer can the CompactRIO system (the FPGA) do any significant processing at a 1MHz rep rate? By "significant processing" I mean a simple feedback loop feeding into a pulse width modulation process.
Thanks,
Kevin
P.S. This system must be a stand alone embedded solution so no PC based solution will do.
Tunde_A
NI Employee (retired)
08-25-2006 05:08 PM
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Hi Kevin,
(1) For now the cRIO-9221 module has the highest sampling rate of 800KHz.
(2) The cRIO (RT) controller's Time Loop has the highest configurable clock rate of 1kHz and a clock granularity of 1ms. Only PXI-based RT controllers have the 1MHz clock available for the Timed Loop timing, because of a much faster on-board processor. The cRIO (FPGA) can perform a PID loop rate up to 200KHz.
Perhaps, the PXI system might be a better option for your application.
Tunde.
Applications Engineer, National Instruments.
JMota
Active Participant
08-28-2006 09:06 AM
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Kevin,
Just for completeness on your second question, you can also have processing running directly on the CompactRIO FPGA which will allow higher processing rates and more determinism than running on the cRIO RT Controller. You will just have to deal with limitations of the FPGA, such as only integer data types, fixed size arrays, etc.
The CompactRIO and R Series FPGAs use an internal 40MHz clock for driving the FPGA. FPGA applications can use that clock to run Timed Loops on the FPGA, which will indeed run at 40MHz.
If the 40MHz clock rate is not enough for the application, the FPGA Module allows you to select higher frequency clocks. Follow this link for more information about it.
http://digital.ni.com/public.nsf/allkb/26ef4475fad65be186256dd7000f4cee
JMota
Just for completeness on your second question, you can also have processing running directly on the CompactRIO FPGA which will allow higher processing rates and more determinism than running on the cRIO RT Controller. You will just have to deal with limitations of the FPGA, such as only integer data types, fixed size arrays, etc.
The CompactRIO and R Series FPGAs use an internal 40MHz clock for driving the FPGA. FPGA applications can use that clock to run Timed Loops on the FPGA, which will indeed run at 40MHz.
If the 40MHz clock rate is not enough for the application, the FPGA Module allows you to select higher frequency clocks. Follow this link for more information about it.
http://digital.ni.com/public.nsf/allkb/26ef4475fad65be186256dd7000f4cee
JMota
