FPGA subVI Multiple Instances

[kevin.key]

I figured it out, and that's essentially what I did. It was kind of counter intuitive for me to do that because I was part thinking LabView part thinking VHDL (I think, not a ton of vhdl experience). I was thinking my subVI was basically an entity with some input signals and that I could just connect some signals to them in my top level VI and that they would just propagate into my subVI.

[Dragis]

That's understandable; as someone with a hardware background, it is easy to lose yourself in the LabVIEW code and forget the dataflow semantics. Although G looks like graphical VHDL, the semantics are quite different.