FPGA: compilation error: size of concat operation is different than size of the target

[Dragis]

Interesting... To ensure I understand, if you force a rebuild the "normal" way, you get the error. But if you go through and touch each VI to dirty it then the compile will succeed. I assume that a subsequent compile will then again fail until you touch each VI again? Is that correct?

[Harlequinade]

Good question. After the compilation I didn't need to do more changes and recompile. I'll try it out.