FPGA Type Casting

[thisisnotadream]

Hey, all!

I'm transferring some execution parameters from a host to an FPGA target using DMA FIFOs.  I'm looking into possibly reducing overhead by packing my data a bit more purposefully.  For example, two related I32s being packed into a single 64-bit and split up on the FPGA side.  However, when I split the data apart, the data becomes U32.  Now I have no way to accurately perform any math on the numbers, as I've lost the sign.  There's no way to type cast back into a signed integer once on the FPGA target that I can see.  Has anyone else solved this, or am I relegated to just using two I32 DMA FIFOs?

Dan M.

[Dragis · Accepted solution]

If you coerce from unsigned to signed and the number of bits is the same, you essentially get a reinterpret case. That would allow you to get your signed number back again. 

[thisisnotadream]

Interesting, I always thought that the conversion VIs just changed the type.  I always knew you had to be careful swapping between signed and unsigned, so I always just avoided it.  Never went through the mental math to convince myself in this situation and everything would be ok.  🙂

Thanks for your brilliant work at telling me something I should have already known without making me feel like a complete tool. 

Dan M.

[D*]

You can also use the Number to Boolean Array, Build Array, and Boolean Array to Number (right click this one to set your output data type) and do the packing explictly yourself:

These functions consume no logic resources on the FPGA because they are purely wiring operations!