11-27-2006 07:40 AM
11-28-2006 04:25 AM
Hai Houssa,
i don't white exactly what you want to realize, anyhow I currently on the same thesis as well
Please give me more hints about what he/she is trying to perform/implement. Does she/he has a subsystem with input/output nodes? Does she/he know the normal way to configure the SIT dll to run on an RT aim.
Fourtwona
11-28-2006 07:07 AM
Hello Fourtwona
First thanks for your answer and your interest, I try to explain what i want to realize. I have a Model in Simulink, I can this Model connect in LabVIEW with simulation interface toolkit, and with SIT Connection manager the hardware I/O as Model I/O configure.11-28-2006 05:47 PM
11-29-2006 04:52 AM
Hi,
11-29-2006 07:37 AM
Hi befaiz,
If you want to work with a 7813R FPGA card, i would recommend to use LabVIEW FPGA instead of simulink. If not, so just using simulink, you will need to build a driver as a set of VIs to perform the communication between FPGA and host system, which means building a VI for the FPGA, one for the host, build a dll out of this and use it in simulink.
Another solution, but without using the FPGA would be: http://zone.ni.com/devzone/cda/tut/p/id/3005#toc0
Christian
11-29-2006 08:16 AM
11-29-2006 08:43 AM
11-29-2006 09:44 AM
11-29-2006 09:51 AM
Hi,
As Phil and I mentioned before, you will need to build a dll out of your LabVIEW code to use it in simulink, there is no other way, except MathWorks has another solution!
BR, Christian