08-11-2017 09:08 AM
Is there a performance difference between reading several channels on a C-series module from a single FPGA I/O node, versus sending an array of I/O channel constants into a FOR loop where each I/O is read once per iteration (disregarding the FOR loop overhead - I am more concerned with scanned channel / read timing on the module)?
08-14-2017 10:03 AM
Hi CFER_STS,
As far as performance goes, no there should not be a difference between these two methods. The one thing to be aware of though is that by including all of the channels in one FPGA node they are automatically synchronized, whereas if they are in their own individual nodes they will not be synchronized as technically though they will still be read at relatively the same time.
Regards,
Conrad
Applications Engineer
National Instruments