I just taught the LabVIEW FPGA course using LV 2010 and came across a problem with the Investigate Timing Errors dialog. None of the items in the list were named properly and clicking on them did not locate the items on the block diagram of the code. They were all named "block diagram object" (not sure if that was it exactly - forgot to write it down). I am wondering if this is a LV FPGA 2010 bug? I did report this on the instructors community as well.

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LabVIEW

Thanks. I reduce the problematic area from about 11 steps to 5 steps logic (attached) , and the compile run OK.

But I think that it`s still annoying, to take a "working well" code from LV9 and find out that in LV10 it can`t be compiled.

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