FPGA Compact RIO compile error : DualPortRAM

[Massif]

  Dear,

For my project, on a compact RIO with the NI9411 (FPGA), I have two single timed loop who run at 40MHz.

The first loop acquire the data and and make some caculations.

The second loop take the results (of the first loop) with local variable and put this result in a FIFO if necessary (FIFO in case structure).

When I compile  the first loop, it run well.

When I compile the two loops, I have this message error:

Analyzing generic Entity <DualPortRAM> (Architecture <rtl>).
ERROR:Portability:3 - This Xilinx application has run out of memory or has encountered a memory conflict.  Current memory usage is 2027296 kb.  Memory problems may require a simple increase in available system memory, or possibly a fix to the software or a special workaround.  To troubleshoot or remedy the problem, first:  Try increasing your system's RAM.  Alternatively, you may try increasing your system's virtual memory or swap space.  If this does not fix the problem, please try the following:  Search the Answers Database at support.xilinx.com to locate information on this error message.  If neither of the above resources produces an available solution, please use Web Support to open a case with Xilinx Technical Support off of support.xilinx.com.  As it is likely that this may be an unforeseen problem, please be prepared to submit relevant design files if necessary.
ERROR:Xflow - Program xst returned error code 19. Aborting flow execution...

I think there is enough RAM 2Go. What could be the memory conflict?

I have  joined the loop 2

Regards 

Massif

 

[BenjaminR]

Hi,

This post have the same topic

http://forums.ni.com/ni/board/message?board.id=170&message.id=277592&requireLogin=False

[Massif]

  Hello BenjaminR,

Thank you for you help.

 Massif