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FPGA Boolean Size in Memory

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LabVIEW stores booleans as a U8 in memory according to the article.

http://zone.ni.com/reference/en-XX/help/371361J-01/lvconcepts/how_labview_stores_data_in_memory/

My question is what happens when you develop in FPGA? Specifically if I made 8 lookup tables with the data type being a boolean, does that take the same amount of resources as a single U8 lookup table? Or is it taking as much resources as 8 U8 lookup tables?
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@Hooovahh wrote:
LabVIEW stores booleans as a U8 in memory according to the article.

http://zone.ni.com/reference/en-XX/help/371361J-01/lvconcepts/how_labview_stores_data_in_memory/

My question is what happens when you develop in FPGA? Specifically if I made 8 lookup tables with the data type being a boolean, does that take the same amount of resources as a single U8 lookup table? Or is it taking as much resources as 8 U8 lookup tables?

I am not 100% sure, but I believe on FPGA a boolean is actually treated as a bit, not a byte. The u8 representation is due to a byte being the smallest addressable unit in a PC type environment. (At least I think this is correct. Someone smarter than me may say otherwise).

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Accepted by topic author Hooovahh

HERE you can find out exactly how much space is used by different things on the FPGA target.

 

Normally a logical X-bit structure consumes X bits since FPGA has no limitations in this regard.

 

Shane.

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Nice resource, Intaris.

 

I'm interested in the resource utilization statistics for a Spartan 6, LX 45 (sbRIO-9606). Is that available somewhere else? Should I deduce them from any of the attachments included in the link you provided?

 

Thanks!

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Most can be found on the Xilinx website:

 

http://www.xilinx.com/publications/prod_mktg/Spartan6_Product_Table.pdf

David H.
National Instruments
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@David-H wrote:

Most can be found on the Xilinx website:

 

http://www.xilinx.com/publications/prod_mktg/Spartan6_Product_Table.pdf


These are the device resources.

What would be great is to have resource utilization charts for more targets.

A few more details in the resource utilization charts would also be nice, e.g. "Scale by Power of 2" is free (uses no resources) when the power is a constant (afaik). How about Index Array when a constant is wired to the index input? What about Rotate?

 

 

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The LabVIEW help states that Index Array and Rotate 1D Array take no clock cycles when constants are used.  Perhaps you need to have the FPGA module installed, but I see these details at the end of all the relevant help pages.

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I'm aware of this, but I think it would be helpful if this information is reflected in the device utilization statistics.

I was not talking about rotate array, just the plain Rotate (for integers). It does not say anything about a constant wired to 'y'. The same for "Logical Shift".

 

 

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Hi dan,

 

the LabVIEW help says this about FPGA device usage of Rotate:

check.png

(atleast in my LV2011 with FPGA module…)

Best regards,
GerdW


using LV2016/2019/2021 on Win10/11+cRIO, TestStand2016/2019
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Thanks, I know, but I wonder if this is true. I would hope it's free when wiring a constant to y (since in this case it's a pure wiring operation).

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