I have updated my FPGA code to interface with my custom mezzanine card. The code runs fine. I am updating the RT code to interface with these changes. Yesterday, both were functioning properly. I made some changes to the FPGA code this morning, which required the code to be recompiled.
Now the RT code is giving an error from the Open FPGA VI Reference. (Error - 61203)
I have noticed that the dependencies list below (circled in green)i ndicates where the FPGA *.lvbitx file is. However, I have another location of a similar file in a different folder. I need to know how to:
1.) Make the *.lvbitx file be located where I want it to (in a specific folder for example)
2.) Make sure the RT.vi is looking at the proper file and location so that they are matched.
Any help would be greatly appreciated.
I’ve attached the FPGA and RT code for review.
Solved! Go to Solution.
You could recompile the code, go to files tab in the project explorer to find the location of the directory where they are stored or alternatively go to search and search for .lvbit files.
Once you know where you have the bitfile you can read the information below in order to point directly to that file. You use the Open FPGA VI Reference Function (First row of the table). It is talking about how we could configure the Configure Open FPGA VI Reference Dialog Box. Normally we use the second option (VI) but you could point directly to the bitfile. It is basically the same information explained here.
The FPGA bitfile was going to a different folder than was being search for by the RT.vi. At present, I copy and paste the FPGA bitfile to the location being looked for by the R.vi. How do I change WHERE the FPGA bitfile gets written?
You do not need to do that if you point to the bitfile directly. Because you can navigate to the existing bitfile.
That did it. I couldn't remember where you designate the folder directory. This did the trick.
Please does anybody of you link to documentation, where -61203 error code is explained?
Eventually what suffix 6390003 means?
From other forums I have several FPGA codes here :
Thanks. And what can be predecessor of this error?
Two same "FPGA references" to same FPGA target, but on two different VI files on RT platform ?
Or forgotten "Close reference" somewhere in code ?