Error 1430 when writing to text file using cRio 9014/9103

[Andrew_E]

Hey Ajay,

I looked at your code and there are two things that need to be fixed. One critical, one not that critical. First, take the Run invoke node outside of the loop. You only need to run that once. I think this will fix the repeating that we are seeing, but even if it doesn't, there shouldn't be any reason to run the fpga code repeatedly. Second, could you initialilze the array that you put your data into, instead of just use the build array function. This will make sure the array you put your data into is initialized correctly.

[sharda]

HI Andrew,

Taking invoke out didnot solve the problem, we still have data with same time stamp. I am that comfortable with initialze array thing, can you explain?? or send some example??

Thanks

Ajay 

[Andrew_E]

Hi Ajay,

Nevermind inintilizing the array. Theres a few questions I have. First, there are alot of coercion dots that shouldn't be in both your host and fpga vi. You put a lot of 16 bit constants for functions that required 32 bit constants. This creates a coercion dot which takes up space in your fpga and slows your host vi down. So if you change that, it could possible slow down your program. Secondly, why are you reading roughly twice as fast for your fpga as your host vi is taking in data? Is this application as simple as sending analog input from your fpga to your host vi on the real time controller? The best way to do this would be to use dma fifos, explained here. Now this has changed a little in LV 8.6 if thats what you are using, but that would be the best way to transfer your data from your fpga target to your host vi.

If you have any questions on how to change implement dma fifos instead of what you have in your code, feel free to ask, but i feel that you change to that in your code, your program will be alot less complicated and the timing issues will dissapear.

Regards,

[sharda]

Hi Andrew,

i have tried that too, but the data acqusition is very much critical to time stamps and in the DMA FIFO thing you can not get the time stamps. It was all working fine before my laptop display crashed while working. It was cor 2 duo 1.8 GHz and 2 Gb RAM and this new desk top is 1 GB RAM with 3.6 GHz hyer thread(!?) processor. The same program which was working perfectly great is now having time stamp issue. I need to have time stamps with the data otherwise the DMA FIFO is a cool option. Can we pass on the time stamp in FIFO???

Thanks

Ajay 

[sharda]

Hi Andrew,

one more clarification regarding reading from FPGA and writing in PC. That 5 ms wait was just a trial on the pc and i have removed that. The only thing we need is 10 ms delay in the FPGA. Also I will try changing to 32 bit from 16 bit and try removing these dots. How do you see and view these dots, can you please guide me?

Thanks

Ajay

[sharda]

Hi Andrew,

I removed all the coersion dots from the program. But the issue of the time stamp probably not being updated quite fast is still there. Please suggest something.

Thanks

Ajay 

[Andrew_E]

Hi Ajay,

I think that your PC is cyclying too fast for your fpga. I think to make the code work properly we should throw an interupt whenever the fpga aquires data and then wait on that interupt on the host side to write the timestamp with that data.

[sharda]

Hi Andrew,

Can you please guide me or since you have the program can show me how to add interrupt?? I will greatly appreciate.

Thanks

ajay 

[Andrew_E]

Hey Ajay,

Check this out. I think it will give you alot of pointers how to wait for your data using the fpga and its alot cleaner then what I could have whipped up in a day. Cheers!

Regards,