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Discrete transfer function VI in FPGA

I’m having trouble with the discrete transfer function implementation for a while now. So I discretized my PID controller with 100 microseconds and Tustin method, and checked the response to a 1 Hz wave in discrete time using Simulink, with the discrete response as attached. Then I tried doing the same with Discrete transfer function VI in FPGA Labview, taking care to factorise the large numerator coefficients so that it respects the input limits of the VI, and then will multiply the coefficient later after the response of the VI. I also made sure the sampling time in the FPGA code is the same as the sampling time of the discrete controller. Despite this the response saturates to its minimum and doesn’t recover. I attach my LabView code and also the response I got (response before multiplying with the large numerator coefficient).

I also tried to do this with a simple integrator, and with this case it actually worked. I attach the results with integrator as well, and also my whole project.

 

Could anyone please help me?

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